- Digital system design methodologies (Laurea Magistrale) codice 095942
Fabrizio Ferrandi is an Associate Professor in the Dipartimento di Elettronica, Informazione e Bioingegneria of the Politecnico di Milano. He received the Laurea degree (cum laude) in Electronic Engineering and the Ph.D. degree in information and automation engineering (computer engineering) from the Politecnico di Milano, Milan, Italy, in 1992 and 1997, respectively (http://ferrandi.faculty.polimi.it/). The Ph.D. thesis on a Methodology for supporting the Design of Testable Digital Systems has received the Chorafas Foundation prize (1997). He joined the faculty of Politecnico di Milano in 1999 as “Ricercatore” and later in 2002 as Associate Professor with the Dipartimento di Elettronica, Informazione e Bioingegneria. He has published over 130 peer-reviewed papers in international journals, books, and proceedings of international congresses (Scopus). According to Google Scholar (https://scholar.google.com/citations?user=_woi0FIAAAAJ&hl=en), he collected more than 2200 citations reaching an h-index of 26. He served in several technical and organizing committees in international conferences and workshops, such as DAC, DATE, FPL, CODES-ISSS, ASP-DAC, Computing Frontier, ISIS, SAMOS, NAS, GVLSI, VIPES, ARCS and ReConFig. He worked as a reviewer of IEEE Transactions on Computers, IEEE Transactions on CAD/ICAS, Transactions on Embedded Computing Systems, Transactions on Reconfigurable Technology and Systems, Transactions on Design Automation of Electronic Systems and of Journal of System Architecture JSA. Fabrizio Ferrandi is a member of the IEEE Computer Society, the Test Technology Technical Committee, HiPEAC Network of Excellence for High-Performance and Embedded Architecture and Compilation, and the European Design and Automation Association. He is one of the maintainers of the PandA/Bambu high-level synthesis tool used to support his research and teaching activities. His current research interests include synthesis, verification, simulation, and testing of digital circuits and systems. He has managed and worked in several ESA/EU funded projects. He received the Best Paper Award EURO-VHDL ’96 for the paper titled “BDD-based Testability Estimation of VHDL Designs” presented at IEEE/ACM European Design Automation Conference and Euro-VHDL, Ginevra, Switzerland, September 16-20 1996 and the Best Paper Award DATE 1999 for the paper titled “Symbolic functional vector generation for VHDL specifications” presented at IEEE/ACM DATE 1999 – Design, Automation and Test in Europe, Munich, Germany, March 9-12 1999.
- Contract professor of Fundamental of Computer Science, Faculty of Engineering, at the University Cattaneo (LIUC), Castellanza – Varese (Italy).Academic years 1994-95, 1995-96, 1996-97, 1997-98, 1998-99, 1999-2000, 2000-01
- Contract professor of Fundamental of Computer Science, Faculty of Economy, at the University Cattaneo (LIUC), Castellanza – Varese (Italy).Academic years 1996-97, 1997-98, 1998-99.
- 2003-2018 LOGIC DESIGN – Computer Engineering – Undergraduate level.
2014-present DIGITAL SYSTEMS DESIGN METHODOLOGIES – Computer and Elettronic Engineering – Master level. Taught in English.
- 2013-present ADVANCED ALGORITHMS AND PARALLEL PROGRAMMING – Computer Engineering – Master level. Taught in English.
Member of Collegio docenti dottorato – INGEGNERIA DELL’INFORMAZIONE of Politecnico di Milano from 01-01-2004 al 31-12-2009.
He taught a PhD course titled “Algoritmi e strutture dati per la progettazione e la verifica di sistemi complessi/ Algoritmi per la Progettazione VLSI” – INGEGNERIA DELL’INFORMAZIONE from 2004 to 2009.